<div class="gmail_quote">2012/5/30 Shun Sakuraba <span dir="ltr"><<a href="mailto:shun.sakuraba@gmail.com" target="_blank">shun.sakuraba@gmail.com</a>></span><br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">
Dear list,<br>
<br>
I would like to share my trial to port GROMACS 4.5 SSE/SSE2 nonbonded kernel<br>
to AMD's new family 15h chip, "Bulldozer" architecture, performed to measure<br>
the benefit of new instructions. In AMD family 15h new FMA4 instructions<br>
are added; FMA4 is the fused multiplication and addition (subtraction) operations.<br>
FMA4 reduces number of instructions and latency, giving a marginal performance boost.<br>
Also there are XOP instructions, which is useful implementing table interpolation<br>
used in GROMACS.<br>
<br></blockquote><div>Dear Shun,</div><div><br></div><div>Great work, however, besides FMA4, the Bulldozer also support three-operand AVX instructions. In fact, FMA4 is an extension to AVX. Intel Sandy Bridge only supports AVX, but no FMA4.</div>
<div><br></div><div>With AVX, you can replace two-operand SSE instructions by three-operand AVX instructions, and avoid copies. For example:</div><div><div><br></div><div>movaps %xmm6,%xmm1 </div><div>mulps %xmm6,%xmm1 ## rinv4</div>
<div>mulps %xmm6,%xmm1 ## rinv6</div><div>movaps %xmm1,%xmm2 </div><div>mulps %xmm2,%xmm2 ## xmm2=rinv12</div></div><div><br></div><div>becomes:</div><div><br></div><div>vmulps %xmm6,%xmm6,%xmm1 ##rinv4</div><div>vmulps %xmm6, %xmm1, %xmm1 ##rinv6</div>
<div>vmulps %xmm1, %xmm1, %xmm2 ## xmm2=rinv12</div><div><br></div><div>With those modifications, you may get additional performance. Often, you can free up registers that hold temporary values, and store values there that would otherwise end up on the stack.</div>
<div><br></div><div>Another direction is using 256-bit ymm registers instead of 128-bit xmm registers, but that would require a thorough rewrite of the kernels. Especially on Sandy Bridge, where each core has its own 256-bit floating point unit, you may very well increase performance by 50% or more.</div>
<div><br></div><div>At Bulldozer, two cores share a 256-bit floating point unit (FPU). With 128-bit instructions, each core uses 'half' of the FPU, and the 128-bit instructions run at full speed. With 256-bit instructions, two cores compete for the FPU, so the performance gain would be limited, compared to Sandy Bridge. Bulldozers can still benefit from FMA4, though, which is not available on Sandy Bridge.</div>
<div><br></div><div>Maik</div></div>-- <br><span></span><div><table style="font-size:7pt;font-family:Tahoma,Arial,Helvetica;padding:0px;border:1px solid rgb(234,239,242)" height="195" width="312">
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